Memories may be based on resistive switching devices, such as, for example, memristors, which may be arranged in a crossbar architecture. A crossbar architecture may include, for example, a crossbar array including a plurality of memristors in each row and column. The number of memristors in any row or column that are in low resistance states can impact the performance of the memories. In order to program or read the value of a memristor, a respective write or read voltage may be applied to the memristor through the respective row and column wires of the selected memristor. However, other memristors connected to the same row and column wires of the selected memristor may also experience voltage drop across their terminals and may thus be considered half-selected. Such half-selected memristors that are in a low resistance state may also contribute to cumulative current draw. The cumulative current draw can lead, for example, to power wastage and inaccuracies in determination of the state of the selected memristor. The cumulative current draw can also lead, for example, to parasitic loss that can limit the crossbar array size. The foregoing aspects can affect initial writing of a crossbar array, as well as overwriting of the crossbar array from an initial state to a target state.